Intern-Design Engineering At Cadence

Requirements B.Tech/B.E/M.Tech/M.E in Electronics (2020 or 2021 Batch) Strong understanding of UVM based verification environment. Experience in Emulation will be a plus Strong interest and understanding of design and verification methodologies Exposure to scripting languages (Perl/Shell/Python) Self-starter and learner with passion for getting the job done on time with great quality. Strong problem solving and […]

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